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74LV132 Quad 2-input NAND Schmitt-trigger
Product specification Supersedes data of 1997 Feb 04 IC24 Data Handbook 1998 Apr 28
Philips Semiconductors
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt-trigger
74LV132
FEATURES
* Wide operating voltage: 1.0 to 5.5V * Optimized for Low Voltage applications: 1.0 to 3.6V * Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V * Typical VOLP (output ground bounce) t 0.8V @ VCC = 3.3V, * Typical VOHV (output VOH undershoot) u 2V @ VCC = 3.3V, * Output capability: standard * ICC category: SSI
Tamb = 25C Tamb = 25C
APPLICATIONS
* Wave and pulse shapers * Astable multivibrators * Monostable multivibrators
DESCRIPTION
The 74LV132 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT132. The 74LV132 contains four 2-input NAND gates which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The gate switches at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the hysteresis voltage VH.
QUICK REFERENCE DATA
GND = 0V; Tamb = 25C; tr = tf v2.5 ns SYMBOL tPHL/tPLH CI CPD PARAMETER Propagation delay nA, nB to nY Input capacitance Power dissipation capacitance per gate Notes 1 and 2 CONDITIONS CL = 15pF VCC = 3.3V TYPICAL 10 3.5 24 UNIT ns pF pF
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in W) VCC2 fi )S (CL VCC2 fo) where: PD = CPD fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; VCC2 fo) = sum of the outputs. S (CL 2. The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES 14-Pin Plastic DIL 14-Pin Plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +125C -40C to +125C -40C to +125C -40C to +125C OUTSIDE NORTH AMERICA 74LV132 N 74LV132 D 74LV132 DB 74LV132 PW NORTH AMERICA 74LV132 N 74LV132 D 74LV132 DB 74LV132PW DH PKG. DWG. # SOT27-1 SOT108-1 SOT337-1 SOT402-1
PIN DESCRIPTION
PIN NUMBER 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 14 SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC Data inputs Data inputs Data outputs Ground (0V) Positive supply voltage FUNCTION
FUNCTION TABLE
INPUTS nA L L H H NOTES: H = HIGH voltage level L = LOW voltage level nB L H L H OUTPUT nY H H H L
1998 Apr 28
2
853-1912 19290
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt-trigger
74LV132
PIN CONFIGURATION
1A 1B 1Y 2A 2B 2Y GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC 4B 4A 4Y 3B 3A 3Y
LOGIC SYMBOL
1 1A 1Y 2 1B 3
4 2A 2Y 5 2B 6
9 3A 3Y 8 10 3B 12 4A 4Y 13 4B 11
SV00213
LOGIC SYMBOL (IEEE/IEC)
1 2 4 5 9 10 12 13 & 3
SV00215
& 6
LOGIC DIAGRAM
& 8 A Y B & 11
SV00217 SV00216
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VO Tamb PARAMETER DC supply voltage Input voltage Output voltage Operating ambient temperature range in free air Input rise and fall times except for Schmitt-trigger inputs See DC and AC characteristics VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V CONDITIONS See Note1 MIN 1.0 0 0 -40 -40 - - - - - - - - TYP 3.3 - - MAX 5.5 VCC VCC +85 +125 500 200 100 50 UNIT V V V C
tr, tf
ns/V
NOTE: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
1998 Apr 28
3
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt-trigger
74LV132
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0V). SYMBOL VCC IIK IOK IO IGND, ICC Tstg PARAMETER DC supply voltage DC input diode current DC output diode current DC output source or sink current - standard outputs DC VCC or GND current for types with - standard outputs Storage temperature range Power dissipation per package - plastic DIL - plastic mini-pack (SO) - plastic shrink mini-pack (SSOP and TSSOP) for temperature range: -40 to +125C above +70C derate linearly with 12 mW/K above +70C derate linearly with 8 mW/K above +60C derate linearly with 5.5 mW/K VI < -0.5 or VI > VCC + 0.5V VO < -0.5 or VO > VCC + 0.5V -0.5V < VO < VCC + 0.5V CONDITIONS RATING -0.5 to +7.0 20 50 25 UNIT V mA mA mA
50 -65 to +150 750 500 400
mA C
PTOT
mW
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V). LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VCC = 1.2V VIH HIGH level Input voltage VCC = 2.0V VCC = 2.7 to 3.6V VCC = 4.5 to 5.5V VCC = 1.2V VIL LOW level Input voltage VCC = 2.0V VCC = 2.7 to 3.6V VCC = 4.5 to 5.5 VCC = 1.2V; VI = VIH or VIL; -IO = 100A VCC = 2.0V; VI = VIH or VIL; -IO = 100A VOH HIGH l ltt level output voltage out uts voltage; all outputs VCC = 2.7V; VI = VIH or VIL; -IO = 100A VCC = 3.0V; VI = VIH or VIL; -IO = 100A VCC = 4.5V; VI = VIH or VIL; -IO = 100A VO OH HIGH level output voltage; g STANDARD outputs VCC = 3.0V; VI = VIH or VIL; -IO = 6mA VCC = 4.5V; VI = VIH or VIL; -IO = 12mA VCC = 1.2V; VI = VIH or VIL; IO = 100A VCC = 2.0V; VI = VIH or VIL; IO = 100A VOL LOW l level output ltt voltage out uts voltage; all outputs VCC = 2.7V; VI = VIH or VIL; IO = 100A VCC = 3.0V; VI = VIH or VIL; IO = 100A VCC = 4.5V; VI = VIH or VIL; IO = 100A 1.8 2.5 2.8 4.3 2.40 3.60 1.2 2.0 2.7 3.0 4.5 2.82 4.20 0 0 0 0 0 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 V 1.8 2.5 2.8 4.3 2.20 V 3.50 V 0.9 1.4 2.0 0.7*VCC 0.3 0.6 0.8 0.3*VCC -40C to +85C TYP1 MAX -40C to +125C MIN 0.9 1.4 2.0 0.7*VCC 0.3 0.6 0.8 0.3*VCC V V MAX UNIT
1998 Apr 28
4
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt-trigger
74LV132
DC CHARACTERISTICS (Continued)
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V). SYMBOL PARAMETER LOW level output voltage; g STANDARD outputs Input leakage current Quiescent supply current; SSI Additional quiescent supply current per input TEST CONDITIONS VCC = 3.0V; VI = VIH or VIL; IO = 6mA VCC = 4.5V; VI = VIH or VIL; IO = 12mA VCC = 5.5V; VI = VCC or GND VCC = 5.5V; VI = VCC or GND; IO = 0 VCC = 2.7V to 3.6V; VI = VCC - 0.6V LIMITS -40C to +85C 0.25 0.35 0.40 0.55 1.0 20.0 500 -40C to +125C 0.50 V 0.65 1.0 40 850 A A A UNIT
VO OL
II ICC ICC
NOTE: 1. All typical values are measured at Tamb = 25C.
TRANSFER CHARACTERISTICS
Voltages are referenced to GND = 0V. LIMITS SYMBOL PARAMETER WAVEFORM CONDITION VCC(V) 1.2 2.0 2.7 VT+ Positive going threshold Figures 1 and 2 3.0 3.6 4.5 5.5 1.2 2.0 2.7 VT- Negative going threshold Figures 1 and 2 3.0 3.6 4.5 5.5 1.2 2.0 2.7 VH Hysteresis (VT+ - VT ) T- Figures 1 and 2 3.0 3.6 4.5 5.5 NOTE: 1. Unless otherwise stated, all typical values are at Tamb = 25C. MIN - 0.8 1.0 1.2 1.5 1.7 2.1 - 0.3 0.4 0.6 0.8 0.9 1.2 - 0.2 0.3 0.4 0.4 0.4 0.6 -40 to +85C TYP1 0.70 1.10 1.45 1.60 1.95 2.50 3.00 0.34 0.65 0.90 1.05 1.30 1.60 2.00 0.30 0.55 0.60 0.65 0.70 0.80 1.00 MAX - 1.4 2.0 2.2 2.4 3.2 3.9 - 0.9 1.4 1.5 1.8 2.0 2.6 - 0.8 1.1 1.2 1.2 1.4 1.5 -40 to +125C MIN - 0.8 1.0 1.2 1.5 1.7 2.1 - 0.3 0.4 0.6 0.8 0.9 1.2 - 0.2 0.3 0.4 0.4 0.4 0.6 1.4 2.0 2.2 2.4 3.2 3.9 - 0.9 1.4 1.5 1.8 2.0 2.6 - 0.8 1.1 1.2 1.2 1.4 1.5 V V V MAX UNIT
1998 Apr 28
5
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt-trigger
74LV132
AC CHARACTERISTICS
GND = 0V; tr = tf = 2.5ns; CL = 50pF LIMITS SYMBOL PARAMETER WAVEFORM CONDITION VCC(V) 1.2 2.0 tPHL/tPLH Propagation delay nA, nB, to nY Figure 6 2.7 3.0 to 3.6 4.5 to 5.5 NOTES: 1. Unless otherwise stated, all typical values are at Tamb = 25C. 2. Typical value measured at VCC = 3.3V. 3. Typical value measured at VCC = 5.0V. MIN - - - - - -40 to +85C TYP1 65 18 15 122 9.02 MAX - 34 24 20 14 -40 to +125C MIN - - - - - MAX - 43 30 25 17 ns UNIT
TRANSFER CHARACTERISTIC WAVEFORMS
VO
10 ICC (A) 8
6
4
2 VH VT- VT+
0 0 0.3 0.6 VIN (V) 0.9 1.2
SV00218
SV00222
Figure 1. Transfer characteristic.
Figure 3. Typical LV132 transfer characteristics; VCC = 1.2V.
100 VI VT+ VT- VM ICC (A) 80
VO
60
SV00220
40
Figure 2. Definition of VT+, VT- and VH; where VT+ and VT- are between limits of 20% and 70%.
20
0 0 0.4 0.8 VIN (V) 1.2 1.6 2.0
SV00224
Figure 4. Typical LV132 transfer characteristics; VCC = 2.0V.
1998 Apr 28
6
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt-trigger
74LV132
TRANSFER CHARACTERISTIC WAVEFORMS (Continued)
TEST CIRCUIT
Vcc
250 ICC (A) 200 Vl PULSE GENERATOR RT D.U.T. 50pF CL RL= 1k VO
150
Test Circuit for Outputs DEFINITIONS
RL = Load resistor
100
CL = Load capacitance includes jig and probe capacitiance RT = Termination resistance should be equal to ZOUT of pulse generators.
50
TEST tPLH/tPHL
VCC < 2.7V 2.7-3.6V
VI VCC 2.7V VCC
0 0 0.6 1.2 1.8 VIN (V) 2.4 3.0
4.5 V
SV00902 SV00225
Figure 7.Load circuitry for switching times.
Figure 5. Typical LV132 transfer characteristics; VCC = 3.0V.
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V v 3.6V VM = 0.5V * VCC at VCC t 2.7V and w 4.5V VOL and VOH are the typical output voltage drop that occur with the output load.
VCC
nA, nB INPUT GND
VM tPHL
VM tPLH
VOH nY OUTPUT VOL VM
SV00219
Figure 6. Input (nA, nB) to output (nY) propagation delays.
1998 Apr 28
7
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt-trigger
74LV132
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
1998 Apr 28
8
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt-trigger
74LV132
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
1998 Apr 28
9
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt-trigger
74LV132
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
1998 Apr 28
10
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt-trigger
74LV132
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
1998 Apr 28
11
Philips Semiconductors
Product specification
Quad 2-input NAND Schmitt-trigger
74LV132
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 08-98 9397-750-04422
Philips Semiconductors
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